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    You are at:Home»NEWS»AMD Unveils Sixth-Generation EPYC Venice Processors: Up to 256 Zen 6 Cores, 203 Billion Transistors, and TSMC 2nm Technology
    NEWS

    AMD Unveils Sixth-Generation EPYC Venice Processors: Up to 256 Zen 6 Cores, 203 Billion Transistors, and TSMC 2nm Technology

    Brady CottonBy Brady CottonJuly 24, 2026
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    At its Advancing AI 2026 event in San Francisco, AMD officially introduced the sixth-generation EPYC Venice server processors, marking a major milestone for the company’s data center roadmap. Built on TSMC’s cutting-edge 2nm process, EPYC Venice is the first high-performance computing processor family to enter mass production using the advanced manufacturing node.

    Designed for cloud computing, artificial intelligence, high-performance computing (HPC), and enterprise workloads, the EPYC Venice lineup delivers significant gains in core count, memory bandwidth, power efficiency, and AI performance over previous generations.

    Four Product Families Target Different Workloads

    AMD has divided the EPYC Venice family into four product segments, each optimized for a specific class of data center applications.

    EPYC 9006 SP7

    The flagship SP7 platform is designed for high-density computing and AI inference workloads. It is aimed at hyperscale data centers running AI agents and compute-intensive applications, with shipments scheduled to begin in the fourth quarter of 2026.

    EPYC SP8

    The SP8 series targets mainstream enterprise servers, offering a balance between performance and scalability for general-purpose data center deployments. AMD expects the SP8 lineup to launch during the first half of 2027.

    EPYC 9006X SP7

    The SP7 X series is optimized for high-performance computing and AI preprocessing. It incorporates AMD’s 3D V-Cache technology to accelerate memory-intensive workloads and is expected to arrive in the second half of 2027.

    EPYC LP (Verano)

    The low-power Verano (LP) platform is specifically designed for AI host nodes, prioritizing power efficiency while maintaining strong compute performance. It is also scheduled for release during the second half of 2027.

    Up to 256 Zen 6 Cores and 203 Billion Transistors

    At the top of the lineup is the EPYC 9006 SP7, which packs an impressive 203 billion transistors.

    The processor combines:

    • TSMC 2nm process for the CPU compute dies
    • TSMC 6nm process for the I/O die

    The flagship configuration offers:

    • Up to 256 Zen 6 CPU cores
    • 512 simultaneous threads
    • Up to 1.6TB/s memory bandwidth
    • Support for PCI Express 6.0

    AMD also noted that a 96-core configuration can boost to frequencies of up to 5.0GHz, providing high single-threaded performance alongside exceptional multicore scalability.

    SP8 Focuses on Mainstream Enterprise Servers

    The SP8 family is designed for more traditional enterprise workloads.

    Key specifications include:

    • 8 to 128 Zen 6 cores
    • Support for 8-channel DDR5 memory
    • Up to 128 PCIe 6.0 lanes
    • Flexible deployment in single- and dual-socket server configurations

    This configuration is intended for virtualization, cloud services, databases, and enterprise applications requiring a balance between compute density and platform cost.

    SP7 X Brings Massive 3D V-Cache

    AMD continues expanding its 3D V-Cache technology with the EPYC 9006X SP7.

    The processor features:

    • 96 Zen 6 cores
    • 1,152MB of 3D V-Cache
    • Approximately three times more cache per core than the standard SP7

    Memory support includes:

    • 16-channel DDR5-8000
    • MRDIMM-12800
    • Up to 1.6TB/s total memory bandwidth

    Maximum boost frequency is expected to reach approximately 5.15GHz.

    The combination of enormous cache capacity and high memory bandwidth is intended to accelerate scientific computing, AI preprocessing, simulation, and other data-intensive workloads.

    Verano LP Optimized for AI Infrastructure

    AMD also introduced EPYC LP (Verano), a processor tailored specifically for AI infrastructure.

    Key features include:

    • Up to 72 Zen 6 cores
    • Maximum boost clock of 5.0GHz
    • 24-channel LPDDR5X memory
    • First support for replaceable SOCAMM2 memory modules

    The platform also upgrades AMD’s CPU-to-GPU interconnect with enhanced xGMI, delivering bandwidth of up to 112Gbps to improve communication between CPUs and AI accelerators.

    Performance Claims

    AMD presented several benchmark comparisons during the launch event.

    According to the company:

    • EPYC Venice delivers 20% higher single-core performance than NVIDIA Vera
    • Overall throughput is 2.2× higher than Vera

    Under a 100kW rack power budget, AMD claims:

    • 3.3× higher overall platform performance than NVIDIA Vera
    • More than 2× higher performance than Intel Xeon 6980P
    • 2× greater general-purpose computing performance compared with Intel’s flagship Xeon processor

    As with all vendor-supplied benchmarks, independent testing will be needed to verify these performance figures across real-world workloads.

    Improved Efficiency for AI Workloads

    Power efficiency is another major focus of the Venice architecture.

    AMD reports that compared with the previous generation:

    • AI performance per watt has improved by 1.4×
    • AI “intelligence per watt” has increased by 1.7×
    • Token generation throughput has risen by 1.8×

    These gains are particularly important for hyperscale AI deployments, where power consumption has become one of the industry’s primary constraints.

    Broad Industry Support

    AMD also announced strong ecosystem backing for EPYC Venice.

    Cloud service providers supporting the platform include:

    • Microsoft
    • Meta
    • Amazon Web Services (AWS)
    • Google Cloud
    • Oracle Cloud

    Server manufacturers planning Venice-based systems include:

    • Dell Technologies
    • Supermicro
    • Hewlett Packard Enterprise (HPE)
    • Lenovo

    This broad partner support is expected to accelerate deployment across enterprise and cloud data centers once the processors become available.

    Pricing Yet to Be Announced

    AMD has not disclosed pricing for the EPYC Venice family.

    The company stated that detailed product configurations and pricing information will be announced closer to each product’s commercial launch.

    Final Thoughts

    With the introduction of the EPYC Venice family, AMD has taken another significant step forward in the server processor market. Featuring TSMC’s 2nm manufacturing technology, up to 256 Zen 6 cores, 203 billion transistors, PCIe 6.0, and support for 1.6TB/s memory bandwidth, the new processors are designed to address the rapidly growing demands of AI, cloud computing, and high-performance computing.

    Combined with dedicated product variants for enterprise servers, HPC, AI infrastructure, and power-efficient deployments, EPYC Venice represents AMD’s most comprehensive server CPU portfolio to date. As AI workloads continue to reshape data center architecture, the sixth-generation EPYC lineup positions AMD to compete aggressively across both traditional enterprise computing and next-generation AI infrastructure.

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