Samsung plans to use fan-out wafer-level packaging (FoWLP) technology for the Exynos 2400 processor.
FoWLP means smaller package sizes, higher integration, and the ability to provide I/O performance. The Exynos 2400 processor is theoretically smaller, more powerful, and more power efficient.
IT Family Lesson (from Wikipedia) :
Fan-out wafer-level packaging is an integrated circuit packaging technology that is an enhancement of standard wafer-level packaging solutions. In traditional technology, the wafer is first cut and the individual cores are then encapsulated; A single core is then encapsulated on a wafer. Package sizes are usually much larger than chip sizes.
In contrast, in the standard WLP process, the IC remains part of the wafer at the time of packaging, which is then cut into smaller pieces. The final package is actually the same size as the bare piece itself.
According to previous information, the Exynos 2400 processor is designed with 1+2+3+4:
One Cortex-X4 core with a clock frequency of 3.1GHz
Two Cortex-A720 cores with a clock frequency of 2.9GHz
Three Cortex-A720 cores with a clock frequency of 2.6GHz
Four Cortex-A520 cores with a clock frequency of 1.8GHz
The Exynos 2400 will use an RDNA2 GPU named Xclipse X940 (tentative) with 6 WGP (12 CU), 8 MB L3 cache, and support for hardware-level raytracing.